Table of Contents
Adder
An adder is a digital circuit that adds two numbers together. Adders are used in the Arithmetic Logic Units (ALU) of many computers and other types of processors.
Types of Adder
It has mainly two types of adder :
- Half Adder
- Full Adder
Half Adder
A combination circuit that performs the addition of two bits is called a half adder. The half adder accepts two binary digits at its input and produces two binary digits at its output, i.e., a sum bit and a carry bit.
The sum can be implemented using EX-OR gate and carry using AND gate.
Truth Table for Half Adder
| A | B | Sum | Carry |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
K-Map for Half Adder
Logic Diagram for Half Adder
As the truth table shows that when both the inputs are different, the sum output is high otherwise it is low. The carry output is high when both the inputs are high.
Full Adder
It is a combinational circuit which is used for adding three binary digits. So, a full adder accepts two input digits and an input carry digit and generate two outputs. The output is known as sum output and other output is carry output.
Truth Table for Full Adder
| A | B | C | Sum | Carry |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
K-Map for Full Adder
Logical Expression
The logical expression for full adder is obtained from the truth table. Product of sum terms are taken whose output is one and it is given as :
The logical expression for carry out is also obtained from truth table
Logic Diagram for Full Adder
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